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 Posted: Fri Aug 01, 2008 12:17 am Post subject: How much supply voltage swing can a latch endure and still r |
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I am planning to use a bunch of 74HC595>s latches to drive some LED
displays. I anticipate the supply voltage to vary (intentionally at a
slow 1mS rep rate) between 2.5 and 5v with slew rates about 1v/uS.
Can these latches still hold their state without changing at these
kind of rates? How could I simulate this to get an idea of how much
supply voltage swing that could be tolerated before data gets
corrupted?
thanks,
al |
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Joerg
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| Posted: Fri Aug 01, 2008 5:36 am Post subject: Re: How much supply voltage swing can a latch endure and sti |
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eyezkubed@yahoo.com wrote:
[quote]I am planning to use a bunch of 74HC595>s latches to drive some LED
displays. I anticipate the supply voltage to vary (intentionally at a
slow 1mS rep rate) between 2.5 and 5v with slew rates about 1v/uS.
Can these latches still hold their state without changing at these
kind of rates? How could I simulate this to get an idea of how much
supply voltage swing that could be tolerated before data gets
corrupted?
thanks,
[/quote]
Well, this spec says 2V min:
http://www.nxp.com/acrobat_download/datasheets/74HC_HCT595_4.pdf
Keep in mind that they need good bypass caps and you>ll have to muscle
those around.
--
Regards, Joerg
http://www.analogconsultants.com/
"gmail" domain blocked because of excessive spam.
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Tim Wescott
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| Posted: Fri Aug 01, 2008 6:41 am Post subject: Re: How much supply voltage swing can a latch endure and sti |
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eyezkubed@yahoo.com wrote:
[quote]I am planning to use a bunch of 74HC595>s latches to drive some LED
displays. I anticipate the supply voltage to vary (intentionally at a
slow 1mS rep rate) between 2.5 and 5v with slew rates about 1v/uS.
Can these latches still hold their state without changing at these
kind of rates? How could I simulate this to get an idea of how much
supply voltage swing that could be tolerated before data gets
corrupted?
thanks,
al
[/quote]
I>m going to guess that as long as all the signals to the chip swing in
synchrony with the VCC line you>ll be OK. I _think_ the problem would
occur if you had a chip whose VCC line was going up while another>s was
going down, or visa-versa.
This could happen within the chip, too, but unless you>re using 4000
series logic 1us is a lot longer than the chip can switch, so it>ll
probably adjust quick enough.
But I>m just guessing. I wouldn>t try simulating this, or at least I
wouldn>t just simulate it -- I>d hook your VCC up to a signal generator
and crank up the frequency until you see odd behavior.
--
Tim Wescott
Wescott Design Services
http://www.wescottdesign.com
Do you need to implement control loops in software?
"Applied Control Theory for Embedded Systems" gives you just what it says.
See details at http://www.wescottdesign.com/actfes/actfes.html |
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